What Yield Prediction Tells You
Before committing to PCB fabrication and component purchasing, Monte Carlo simulation predicts what fraction of manufactured units will pass all RF specifications. A well-designed RF matching network should achieve ≥90% yield under component tolerances — both tighter and wider specifications significantly impact production cost.
Statistical Foundation
Monte Carlo simulation randomly samples component values within their tolerance distributions: Uniform distribution (±5% tolerance): L_actual ~ Uniform(L_nominal × 0.95, L_nominal × 1.05) C_actual ~ Uniform(C_nominal × 0.95, C_nominal × 1.05) Normal distribution (better for real production lots): L_actual ~ Normal(L_nominal, σ = tolerance/3) → 99.7% of units within ±3σ = ±tolerance range RF View default: uniform distribution
Step-by-Step Yield Analysis
- Build matching circuit in RF View Circuit Simulator (ideal L + C + DUT S2P)
- Verify nominal S11 meets spec: S11 < −10 dB at 880–960 MHz
- Open Tolerance Analysis → set component tolerances:
- L1 (3.3 nH): ±5% (standard SMD)
- C1 (6.8 pF): ±5% (C0G) or ±10% (X7R)
- Run N=500 iterations → wait 5–10 seconds
- Count passing simulations (S11 < −10 dB throughout 880–960 MHz)
- Yield = passing/500 × 100%
Interpreting Results
| Yield | Interpretation | Action |
|---|---|---|
| >95% | Excellent — robust design | Proceed to PCB fabrication |
| 90–95% | Good — meets typical production target | Consider tightening one component tolerance |
| 80–90% | Marginal — borderline production cost | Redesign: lower Q or use Pi/T topology |
| <80% | Poor — too many rejects in production | Redesign required before proceeding |
RF View Monte Carlo: Configure tolerances, run 200–1000 iterations, read yield percentage directly from the Tolerance Analysis tab. Free on Android.