Post-Assembly RF Verification Workflow
After assembling an RF PCB, the first step is S-parameter measurement with a VNA to compare measured performance against the pre-assembly simulation. RF View bridges the gap — load both simulation results (SNP files from EDA tool) and measured results on the same chart.
Step 1: Export Simulation Results
From EDA tool (ADS, AWR, Qucs, etc.): Export S-parameter simulation result as .s2p Touchstone file Include ideal match simulation AND real component model simulation Name clearly: sim_ideal.s2p, sim_real_components.s2p
Step 2: Measure Assembled PCB with VNA
SOLT calibration at PCB SMA connectors
Measure:
S11: input matching network performance
S21: gain and insertion loss through the circuit
S22: output matching (if relevant)
Save as: measured_rev1.s2p
Step 3: Overlay in RF View for Comparison
- Load sim_ideal.s2p → trace 1 (blue)
- Load sim_real_components.s2p → trace 2 (green)
- Load measured_rev1.s2p → trace 3 (red)
- Compare: ideal → real component → measured → identifies each degradation stage
Common PCB Degradation Patterns
| Observation | Root Cause | Fix |
|---|---|---|
| S11 center freq shifted +5% | Lower εr than assumed (FR4 lot variation) | Adjust component values or use controlled-εr PCB |
| S11 worse than real-component sim | PCB trace inductance adds to series L | Shorten trace, reduce L value |
| New resonance at 2× design freq | Component SRF causes second resonance | Choose component with higher SRF |
| S11 ripple not present in simulation | PCB ground plane cut creates resonance | Restore solid ground plane, add via stitching |
| S21 lower than expected | Excess trace loss on FR4 at operating freq | Shorten RF traces, upgrade to Rogers substrate |
RF View PCB Verification: Load simulation and measurement files simultaneously. Table Marker reads exact S11 from each at design frequency. Quickly identify whether mismatch is from components or layout. Free on Android.